Hold timing is checked in which mode (Max or Min)? Why?

o   Hold timing is checked using Minimum (Min) path delays. This is often referred to as Min Timing Analysis or Best-Case Analysis.

o   Hold Violation Condition: A hold violation occurs if the new data launched by the launch flop arrives at the capture flop before the capture flop has had enough time to reliably capture the previous data from the same clock edge. In other words, the data path is too fast relative to the clock path.

o   Worst-Case for Hold: The worst-case scenario for a hold violation happens when:

o   The data path is at its fastest possible speed (minimum delay).

o   The launch clock path is at its fastest possible speed (minimum latency).

o   The capture clock path is at its slowest possible speed (maximum latency).

o   Therefore, hold checks use minimum path delays (Min timing mode) to find the scenario where data arrives earliest, posing the greatest risk of violating the hold requirement.