How to perform manual clock tuning during ECOs?

o   It requires careful analysis and is typically done for critical paths where there is no scope in data path.

o   For setup:

o   Early the launch clock or delay the capture clock so skew can be increased which helps in setup violation. With this you are reducing the skew in path before and after this path. So there should be setup margin in both adjacent paths and hold margin in same path.

o   For Hold:

o   Delay the launch clock or early the capture clock so skew can be reduced which helps in hold violations. Path should have setup margin. And path before and after this path should have hold margin as for them it will increase the skew.

o   Analyze Clock Path:

o   Trace the launch and capture clock paths for the violating timing path.

o   Identify existing buffers/inverters on these clock paths, their drive strengths, and locations.

o   Understand the common clock path and the diverging points.

o   Make desired changes after diverging point, ex, upsize, downsize, add delay based on setup or hold fix.

o   Apply ECO in PNR tool and run STA to verify fixes