o Incorrect Nets / Connectivity Errors: This section details discrepancies in how nets are connected.
o
Shorts: When Schematic has more nets but
layout has less nets, layout has short.
o
Opens: A single net in the schematic
corresponds to two or more unconnected nets in the layout.
o
Incorrect Instances / Devices:
Discrepancies in the number or type of devices.
o
Missing Devices: A device present in the
schematic is not found in the corresponding location/netlist in the layout.
o
Extra Devices: A device extracted from
the layout has no corresponding instance in the schematic. Debugging:
Check if the device was accidentally deleted/added in the layout or schematic,
or if the LVS tool misidentified a structure due to layout errors near the
device.
o
Incorrect Ports: Mismatches in the number
or names of top-level ports between schematic and layout.
o
Parameter Mismatches (Property Errors):
Devices match in type and connectivity, but their calculated parameters (e.g.,
transistor Width, Length, Resistor value, Capacitor value) differ between
schematic and layout beyond a specified tolerance.
o
Non-equivalent Points: This is a general
term often used in the summary indicating the LVS check failed. The detailed
sections (Incorrect Nets, Instances, Properties) provide the specifics.
o
LVS Report Interpretation: https://www.ijraset.com/fileserve.php?FID=25120
(Practical Approach to LVS paper)
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