How is clock gater cloning done?

o   Single ICG cell driving a large number of flip-flops (high fanout) is replicated into multiple identical ICG cells, each driving a smaller subset of the original flip-flops. All cloned ICG cells share the same input clock and enable signal.

1.       Identify High Fanout ICGs: The synthesis or CTS tool identifies ICG cells whose fanout exceeds a certain threshold or which are causing timing/DRV issues due to high load.

2.       Cluster Sinks: The flip-flops driven by the original ICG are spatially clustered based on their placement location.

3.       Replicate ICG: The original ICG cell is replaced by multiple instances of the same ICG cell type.

4.       Connect Subsets: Each cloned ICG cell is connected to drive the clock pins of the flip-flops within one cluster.

5.       Connect Inputs: The clock input and enable input nets are connected to all the cloned ICG cells. (The enable net might need buffering if its load increases significantly).

Cloning is typically performed automatically by synthesis or CTS tools based on fanout limits, timing optimization, and power considerations.