o Clock groups might be updated after CTS based on new tree topologies causing new violation.
o
Physical Detours and Congestion: The
newly inserted clock buffers and routing can create congestion, forcing data
path signals to take longer routes (detours) around the clock tree structures,
thereby increasing their delay.
o
CTS might trigger ECO fixes or buffer
legalization that shifts data path buffers or cells.
o
Actual skew values achieved is more than
expected and considered in uncertainty, causing mismatch.
o
CTS fixes DRC. And move around cells can cause
timing violation.
o
Very tight CTS constraint can cause CTS to add
more buf/inv creating congestion and shifting nonCTS cells.
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