Difference between unresolved reference and blackbox?

If “MyIP” is instantiated at top level netlist, but if no definition is found of MyIP, then it becomes unresolved reference.

my_module u1 (.clk(clk), .rst(rst)); // 'my_module' is not defined anywhere in netlist or not found definition through .lib as well.

Blackbox:

module my_module (input clk, input rst);

  // No internal implementation here

Endmodule

In this case, my_module is blackbox, as it is defined but only ports, no internal logic defined.