How are decap cells placed?

o   Filler Replacement: Tools often place decaps in available whitespace within standard cell rows, replacing filler cells. This is the most common method.

o   Near High-Switching Logic: Targeted placement near blocks or cells known to have high switching activity (e.g., clock buffers, data path muxes, bus drivers).

o   Around Macros: Placing decap cells in the channel space surrounding memory macros or other large IP blocks.

o   Under Power Straps: Some flows allow placing decap cells directly underneath higher-level power grid straps.

o   Uniform Sprinkle: Tools often aim for a relatively uniform distribution across the core area to provide baseline decoupling everywhere.

o   Density Target: Placement might be driven by a target decap density (e.g., percentage of total cell area or capacitance per unit area), often higher in areas identified as hotspots by power analysis.

o   Checkerboard/Regular Pattern: Sometimes placed in a regular pattern (e.g., every N sites) if specific rules or manual placement strategies are used.